Modulators and demodulators of signals often employ unsigned squaring circuits that square the signals in order to shift and re-shift the frequency of the signals. Unsigned squaring circuits are specialized multiplication circuits that are smaller in size and more efficient in performance than general multiplication circuits. In communication applications, however, most signals are signed. In order to use the more efficient unsigned squaring circuit for these applications, the absolute value of the signal is taken by the modulators and demodulators before transmitting the signal to the unsigned squaring circuit.
When modulators and demodulators are implemented using programmable logic, however, implementing circuitry that takes an absolute value of a signed signal would require additional adder and multiplexing components. The additional adder and multiplexing components would add levels of logic that would not only increase the size of the modulator and demodulator, but also decrease the performance and increase the routing resources required of the modulators and demodulators.
Thus, what is needed is an efficient squaring circuit architecture that may square signed numbers without incurring the drawbacks of prior art approaches.